The switch everything else is built on

I can write a sorting algorithm without thinking about it, and I have never once been able to explain, from physics, why a transistor switches. Everything I do professionally sits on top of that fact and I’ve always just accepted it as a black box: gate high, switch closed. This is the post where I stop accepting that.

The simple version

Picture a garden hose with a pinch in the middle, squeezed shut by a little door. No water gets through until you pull a lever next to the door — pull it, the door opens, water flows. Push it back, the door shuts again. A transistor is that pinched hose: electricity is the water, and a tiny voltage on the “gate” is the lever. A computer chip is billions of these tiny water-doors, opening and shutting billions of times a second.

Why silicon conducts badly, on purpose

Silicon is group IV — four valence electrons, and in a crystal each atom shares one electron with each of its four neighbours. Every electron is locked into a bond. At absolute zero there’s nothing free to carry current at all; at room temperature thermal energy knocks a small number of electrons loose, each one leaving behind a hole — an empty bond that a neighbouring electron can hop into, which looks exactly like a positive charge moving the other way. Pure (“intrinsic”) silicon is a bad conductor precisely because so few carriers exist. That’s the property worth exploiting: if the carrier count is small and controllable, you can control the conduction.

Doping: choosing which carrier you get

Replace a tiny fraction of silicon atoms with an impurity and you choose which carrier dominates.

Neither material is a switch by itself — both conduct rather well, just with a different sign of carrier. The switch shows up at the junction between them.

The junction, and why it’s one-way

Put p-type next to n-type and, right at the boundary, electrons from the n-side diffuse across and fall into holes on the p-side, and holes diffuse the other way. Each recombination event removes a mobile carrier and uncovers a fixed dopant ion — positive ions left behind on the n-side, negative ions on the p-side. That strip of exposed, uncovered charge is the depletion region, and it sets up an electric field pointing from n to p that opposes further diffusion. Diffusion and drift reach equilibrium and the field stays.

Apply an external voltage that pushes against that field (forward bias) and it narrows, then collapses, and carriers flood across — the junction conducts. Apply voltage the other way (reverse bias) and the depletion region widens, carriers are pulled away from the boundary, and almost nothing flows. That’s a diode: current one way, not the other. It’s not yet a switch, because there’s no third terminal to control it — but the depletion region it introduces is the mechanism the next section repurposes.

The MOSFET: a junction you can gate

Take a p-type substrate. Embed two n-type wells in it, close together but not touching — call them source and drain. Between them, lay a thin insulating oxide layer, and on top of that a conductive gate.

        source            gate           drain
        (n+)          ┌────────┐         (n+)
      ┌─────┐          │ oxide  │        ┌─────┐
      │     │██████████│  SiO2  │████████│     │
      └─────┘          └────────┘        └─────┘
      ────────────────────────────────────────────
                  p-type substrate

With no voltage on the gate, source and drain are two n-type islands separated by p-type body — back to back diodes, one of which is always reverse-biased no matter which way you push. No current flows between source and drain regardless of the voltage between them. This is the off state, and note what’s producing it: it’s the same depletion-region physics as the diode, just arranged so it blocks conduction in both directions at once.

Now raise the gate voltage. The gate, the oxide, and the p-type body form a capacitor. Positive charge on the gate repels the majority holes in the body directly beneath it and attracts minority electrons up to that surface. Push hard enough and enough electrons accumulate there to invert the local material from p-type to effectively n-type — a thin channel now bridges source and drain, both n-type, and current flows. That crossover point is the threshold voltage, $V_{th}$. Below it: open circuit. Above it: a conductive path exists, and the gate never carries any current to make it happen — it’s charging a capacitor, not driving a current. That’s the whole trick: an electric field, not a current, decides whether current flows somewhere else. That electrical isolation is what makes it usable as a digital switch rather than a leaky analogue control.

The basic mathematics

Below threshold, the model is trivial: $I_D = 0$. Above it, in the regime digital circuits mostly avoid dwelling in but always pass through, the drain current follows a square law in how far the gate voltage exceeds threshold:

$$I_D = \frac{1}{2} \mu_n C_{ox} \frac{W}{L} \left(V_{GS} - V_{th}\right)^2$$

Every term is a knob a fabrication process gets to choose: $\mu_n$ is electron mobility (a material property), $C_{ox}$ is the oxide’s capacitance per unit area (thinner oxide, more capacitance, lower voltage needed to reach threshold), and $W/L$ is the channel’s width-to-length ratio, the one parameter a chip designer sets directly by drawing the transistor’s geometry. None of it needs to be memorised — the point worth keeping is qualitative: current turns on smoothly, not instantly, as a function of $(V_{GS} - V_{th})^2$, and a digital circuit is a decision to only ever read the result at the two extremes of that curve and never trust the middle.

What I’d forgotten

That the gate draws (ideally) zero static current — it’s a capacitor plate, not a resistor. I’d internalised “voltage in, switch closes” without ever registering why that doesn’t cost current, which is the entire reason you can fan a gate’s output out to drive many other gates without each one loading down the source. Power in a CMOS circuit is spent charging and discharging those gate capacitances every time a signal switches, not in holding a static state — which is also, incidentally, why clock frequency trades so directly against power.

What I’d check

The square-law model above is the textbook long-channel approximation. Modern process nodes are nowhere near long-channel — velocity saturation, short-channel effects, and quantum tunnelling through an oxide only a few atoms thick all matter in practice. I’m treating this post as the idealised model on purpose, the same way a first mechanics course uses point masses: right shape, wrong for anything you’d tape out.

Quick recap (quiz yourself)

Cover the answers and see how many you can get before checking.

Q: What are the two things silicon needs added to it to make it useful for building switches? A: Impurities — atoms that either add a spare electron (n-type) or leave a missing spot, a “hole” (p-type).

Q: What happens at the boundary between p-type and n-type silicon? A: A depletion region forms — a zone with no free carriers and a built-in electric field, which is what makes a diode conduct in only one direction.

Q: In a MOSFET, what turns the channel between source and drain “on”? A: Raising the gate voltage above the threshold voltage, which pulls enough electrons to the surface beneath the gate to form a conductive channel.

Q: Does current flow into the gate to switch the transistor on? A: No — the gate is a capacitor plate, charged by voltage rather than driven by current, which is why gates draw essentially zero static current.

Q: Why does digital logic only care about two voltage levels instead of the whole curve? A: Because a circuit is designed with noise margins so any voltage close enough to “high” or “low” reads as a clean 1 or 0 — the messy middle of the curve is deliberately never trusted.